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A method of the pipelined datapath synthesis which is based on the genetic programming is used for the discrete cosine transform (DCT) processor synthesis. The method is based on the representation of the algorithm by the spaced synchronous data flow graph (SDF), transferring it to a chromosome, and using the genetic optimization process. The method is implemented in the SDFCAD program system which is able to perform the input of algorithms specified by the SDF and automatically perform the synthesis of pipelined processors. The DCT processors synthesized by this system have less hardware volume and higher throughput than the similar processors configured in FPGA.